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font-size:10.0pt; font-family:"Times New Roman","serif";} </style> <![endif]--><!-- saved from url=(0031)http://mehr.sharif.edu/~ejlali/ --><!-- saved from url=(0031)http://mehr.sharif.edu/~ejlali/ --><!--[if gte mso 9]><xml> <o:shapedefaults v:ext="edit" spidmax="1026"/> </xml><![endif]--><!--[if gte mso 9]><xml> <o:shapelayout v:ext="edit"> <o:idmap v:ext="edit" data="1"/> </o:shapelayout></xml><![endif]--> </head> <body bgcolor=white background="Alireza%20Ejlali's%20Home%20Page_files/cnvbkgnd.jpg" lang=EN-US link="#0066CC" vlink="#006666" style='tab-interval:36.0pt' alink="#996699"> <div class=WordSection1> <p align=center style='text-align:center'>&nbsp;</p> <p align=center style='text-align:center'>&nbsp;<o:p></o:p></p> <div align=center> <table class=MsoNormalTable border=1 cellpadding=0 width="65%" style='width:65.0%;mso-cellspacing:1.5pt;mso-yfti-tbllook:1184;mso-padding-alt: 0cm 5.4pt 0cm 5.4pt' height=380> <tr style='mso-yfti-irow:0;mso-yfti-firstrow:yes;mso-yfti-lastrow:yes; height:280.5pt'> <td width="44%" style='width:44.0%;padding:.75pt .75pt .75pt .75pt; height:280.5pt'> <p align=center style='text-align:center'><span style='mso-no-proof:yes'><img width=264 height=363 id="_x0000_i1039" src="Alireza%20Ejlali's%20Home%20Page_files/p4h.jpg" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: C:\Alireza\New-Sharif-Works\My_Home_Page\My-Home-Page-93\Alireza Ejlali's Home Page_files\p4h.jpg"></span></p> </td> <td width="56%" style='width:56.0%;padding:.75pt .75pt .75pt .75pt; height:280.5pt'> <p>&nbsp;</p> <blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'> <p><span class=SpellE><span style='font-size:24.0pt'>Alireza</span></span><span style='font-size:24.0pt'> <span class=SpellE>Ejlali</span>, Ph.D.</span>&nbsp;</p> <p><strong><span style='font-size:13.5pt'>Associate Professor</span></strong></p> <p><strong><a href="http://ce.sharif.edu/">Department of Computer Engineering</a></strong></p> <p><a href="http://www.sharif.edu/"><strong>Sharif University of Technology</strong></a></p> <p><strong><span style='font-size:13.5pt'>Email:</span></strong><span style='font-size:13.5pt'> <span class=SpellE>my_last_name</span> AT sharif.edu</span></p> <p><strong><span style='font-size:13.5pt'>Fax:</span></strong><span style='font-size:13.5pt'> (98 21) 6601 9246</span></p> <p><strong><span style='font-size:13.5pt'>Office:</span></strong><span style='font-size:13.5pt'> 622</span><b><span style='font-size:18.0pt; font-family:"Arial","sans-serif"'>&nbsp;</span></b></p> </blockquote> <p>&nbsp;</p> </td> </tr> </table> </div> <p align=center style='text-align:center'>[<a href="#CV">Short CV</a>] [<a href="#RI">Research Interests</a>] [<a href="#PB">Publications</a>] [<a href="#ST">Students</a>] [<a href="http://esrlab.ce.sharif.edu/">Laboratory</a>] [<a href="#CT">Courses</a>]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </p> <p>&nbsp;</p> <p><a name=CV></a><span class=SpellE>Alireza</span> <span class=SpellE>Ejlali</span> is an Associate Professor of Computer Engineering at Sharif University of Technology, Tehran, Iran. He received a Ph.D. degree in computer engineering from Sharif University of Technology in 2006. From 2005 to 2006, he was a visiting researcher in the Electronic Systems Design Group, University of Southampton, UK. In 2006 he joined Sharif University of Technology as a faculty member in the department of computer engineering and from 2011 to <span class=GramE>2015,</span> he was the director of Computer Architecture Group in this department. He is now the director of Embedded Systems Research Laboratory (ESR-LAB) at the department of computer engineering, Sharif University of Technology. His research interests include low power design, real-time embedded systems, and fault-tolerant embedded systems.</p> <p>&nbsp;</p> <p><a name=RI></a><b><i><u><span style='font-size:18.0pt;font-family:"Arial","sans-serif"'>Research Interests</span></u></i></b><o:p></o:p></p> <table class=MsoNormalTable border=0 cellspacing=0 cellpadding=0 width="100%" style='width:100.0%;mso-cellspacing:0cm;mso-yfti-tbllook:1184;mso-padding-alt: 0cm 0cm 0cm 0cm'> <!--msimagelist--> <tr style='mso-yfti-irow:0;mso-yfti-firstrow:yes'> <!--msimagelist--> <td width=42 valign=top style='width:31.5pt;padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><!--msimagelist--><span style='mso-fareast-font-family: "Times New Roman";mso-no-proof:yes'><img border=0 width=15 height=15 id="_x0000_i1038" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul1.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 3"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td width="100%" valign=top style='width:100.0%;padding:0cm 0cm 0cm 0cm'> <p style='margin-bottom:0cm;margin-bottom:.0001pt'><b><span style='font-family: "Arial","sans-serif"'>Embedded Systems</span></b><o:p></o:p></p> <!--msimagelist--> <table class=MsoNormalTable border=0 cellspacing=0 cellpadding=0 width="100%" style='width:100.0%;mso-cellspacing:0cm;mso-yfti-tbllook:1184;mso-padding-alt: 0cm 0cm 0cm 0cm'> <!--msimagelist--><!--msimagelist--> <tr style='mso-yfti-irow:0;mso-yfti-firstrow:yes'> <!--msimagelist--> <td width=42 valign=top style='width:31.5pt;padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=12 height=12 id="_x0000_i1037" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul2.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 9"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td width="100%" valign=top style='width:100.0%;padding:0cm 0cm 0cm 0cm'> <p>Real-Time Embedded Systems</p> </td> </tr> <tr style='mso-yfti-irow:1'> <!--msimagelist--> <td width=42 valign=top style='width:31.5pt;padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=12 height=12 id="_x0000_i1036" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul2.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 9"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td width="100%" valign=top style='width:100.0%;padding:0cm 0cm 0cm 0cm'> <p>Low-Power Embedded Systems</p> </td> </tr> <tr style='mso-yfti-irow:2;mso-yfti-lastrow:yes'> <td valign=top style='padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=12 height=12 id="_x0000_i1035" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul2.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 8"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td valign=top style='padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"'>Dependable Embedded Systems<o:p></o:p></span></p> </td> </tr> <!--msimagelist--> </table> <p>&nbsp;</p> </td> </tr> <!--msimagelist--> <tr style='mso-yfti-irow:1;mso-yfti-lastrow:yes'> <!--msimagelist--> <td width=42 valign=top style='width:31.5pt;padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=15 height=15 id="_x0000_i1034" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul1.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 2"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td width="100%" valign=top style='width:100.0%;padding:0cm 0cm 0cm 0cm'> <p style='margin-bottom:0cm;margin-bottom:.0001pt'><b><span style='font-family: "Arial","sans-serif"'>Low Power Design</span></b><o:p></o:p></p> <!--msimagelist--> <table class=MsoNormalTable border=0 cellspacing=0 cellpadding=0 width="100%" style='width:100.0%;mso-cellspacing:0cm;mso-yfti-tbllook:1184;mso-padding-alt: 0cm 0cm 0cm 0cm'> <!--msimagelist--><!--msimagelist--> <tr style='mso-yfti-irow:0;mso-yfti-firstrow:yes'> <!--msimagelist--> <td width=42 valign=top style='width:31.5pt;padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=12 height=12 id="_x0000_i1033" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul2.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 6"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td width="100%" valign=top style='width:100.0%;padding:0cm 0cm 0cm 0cm'> <p>Power Consumption Issues in Fault Tolerant Systems</p> </td> </tr> <tr style='mso-yfti-irow:1'> <!--msimagelist--> <td width=42 valign=top style='width:31.5pt;padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=12 height=12 id="_x0000_i1032" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul2.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 6"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td width="100%" valign=top style='width:100.0%;padding:0cm 0cm 0cm 0cm'> <p>Power Management in Real-Time Systems</p> </td> </tr> <tr style='mso-yfti-irow:2;mso-yfti-lastrow:yes'> <td valign=top style='padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=12 height=12 id="_x0000_i1031" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul2.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 5"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td valign=top style='padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"'>Adiabatic Circuits<o:p></o:p></span></p> </td> </tr> <!--msimagelist--> </table> <p>&nbsp;</p> </td> </tr> <!--msimagelist--> </table> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; display:none;mso-hide:all'><o:p>&nbsp;</o:p></span></p> <!--msimagelist--> <table class=MsoNormalTable border=0 cellspacing=0 cellpadding=0 width="100%" style='width:100.0%;mso-cellspacing:0cm;mso-yfti-tbllook:1184;mso-padding-alt: 0cm 0cm 0cm 0cm'> <!--msimagelist--> <tr style='mso-yfti-irow:0;mso-yfti-firstrow:yes;mso-yfti-lastrow:yes'> <!--msimagelist--> <td width=42 valign=top style='width:31.5pt;padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=15 height=15 id="_x0000_i1030" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul1.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 1"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td width="100%" valign=top style='width:100.0%;padding:0cm 0cm 0cm 0cm'> <p style='margin-bottom:0cm;margin-bottom:.0001pt'><b><span style='font-family: "Arial","sans-serif"'>Dependability Evaluation and Reliability Assessment</span></b><o:p></o:p></p> <!--msimagelist--> <table class=MsoNormalTable border=0 cellspacing=0 cellpadding=0 width="100%" style='width:100.0%;mso-cellspacing:0cm;mso-yfti-tbllook:1184;mso-padding-alt: 0cm 0cm 0cm 0cm'> <!--msimagelist--> <tr style='mso-yfti-irow:0;mso-yfti-firstrow:yes;mso-yfti-lastrow:yes'> <!--msimagelist--> <td width=42 valign=top style='width:31.5pt;padding:0cm 0cm 0cm 0cm'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=12 height=12 id="_x0000_i1029" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul2.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 4"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td width="100%" valign=top style='width:100.0%;padding:0cm 0cm 0cm 0cm'> <p>Fault Injection into HDL Models (Simulation-Based and FPGA-Based)</p> </td> </tr> <!--msimagelist--><!--msimagelist--><!--msimagelist--> </table> <!--msimagelist--></td> </tr> </table> <p>&nbsp;</p> <p><a name=PB></a><b><i><u><span style='font-size:18.0pt;font-family:"Arial","sans-serif"'>Publications</span></u></i></b></p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>1.<span style='font:7.0pt "Times New Roman"'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><![endif]><span dir=LTR></span>F. R. <span class=SpellE>Poursafaei</span>, M. <span class=SpellE>Bazzaz</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>NPAM: NVM-Aware Page Allocation for Multi-core Embedded Systems</span>&quot;, <i>IEEE Transactions on Computers</i>, in Press.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>2.<span style='font:7.0pt "Times New Roman"'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. T. <span class=SpellE>Teimoori</span> <span class=SpellE>Nodeh</span>, M. <span class=SpellE>Bazzaz</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Exploiting Approximate MLC-PCM in Low-Power Embedded Systems </span>&quot;, <i>ACM Transactions on Embedded Computing Systems</i>, in Press.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>3.<span style='font:7.0pt "Times New Roman"'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Salehi</span>, M. <span class=SpellE>Khavari</span> <span class=SpellE>Tavana</span>, S. <span class=SpellE>Rehman</span>, M. <span class=SpellE>Shafique</span>, A. <span class=SpellE>Ejlali</span>, and J. Henkel, &quot;<span style='color:navy'>Two-State <span class=SpellE>Checkpointing</span> for Energy-Efficient Fault-Tolerance in Hard Real-Time Systems</span>&quot;, <i>IEEE Transactions on Very Large Scale Integration (VLSI) Systems</i>, Volume: 24, Issue: 7, pp. 2426-2437, 2016.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>4.<span style='font:7.0pt "Times New Roman"'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Salehi</span>, A. <span class=SpellE>Ejlali</span>, and B. Al-<span class=SpellE>Hashimi</span>, &quot;<span style='color:navy'>Two-Phase Low-Energy N-Modular Redundancy for Hard Real-Time Multi-Core Systems</span>&quot;, <i>IEEE Transactions on Parallel and Distributed Systems</i>, Volume: 27, Issue: 5, pp. 1497-1510, 2016.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>5.<span style='font:7.0pt "Times New Roman"'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Mohajjel</span> <span class=SpellE>Kafshdooz</span>, M. <span class=SpellE>Taram</span>, S. <span class=SpellE>Assadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A Compile-Time Optimization Method for WCET Reduction in Real-Time Embedded Systems through Block Formation</span>&quot;, <i>ACM Transactions on Architecture and Code Optimization</i>, Volume: 12, Issue: 4, pp. 66:1-66:25, 2015.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>6.<span style='font:7.0pt "Times New Roman"'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Mohajjel</span> <span class=SpellE>Kafshdooz</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Dynamic Shared SPM Reuse for Real-Time Multicore Embedded Systems</span>&quot;, <i>ACM Transactions on Architecture and Code Optimization</i>, Volume: 12, Issue: 2, pp. 12:1-12:25, 2015.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>7.<span style='font:7.0pt "Times New Roman"'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Salehi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A Hardware Platform for Evaluating Low-Energy Multiprocessor Embedded Systems Based on COTS Devices</span>&quot;, <i>IEEE Transactions on Industrial Electronics</i>, Volume: 62, Issue: 2, pp. 1262-1269, 2015.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>8.<span style='font:7.0pt "Times New Roman"'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Malekpour</span>, A. <span class=SpellE>Ejlali</span>, and S. <span class=SpellE>Gorgin</span>, &quot;<span style='color:navy'>A Comparative Study of Energy/Power Consumption in Parallel Decimal Multipliers</span>&quot;, <i>Microelectronics Journal</i>, Volume: 45, Issue: 6, pp. 775-780, 2014.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>9.<span style='font:7.0pt "Times New Roman"'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Ebrahimi</span>, A. <span class=SpellE>Mohammadi</span>, A. <span class=SpellE>Ejlali</span>, and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>A Fast, Flexible, and Easy-to-Develop FPGA-Based Fault Injection Technique</span>&quot;, <i>Microelectronics Reliability</i>, Volume: 54, Issue: 5, pp. 1000-1008, 2014.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>10.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Bazzaz</span>, M. <span class=SpellE>Salehi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>An Accurate Instruction-Level Energy Estimation Model and Tool for Embedded Systems</span>&quot;, <i>IEEE Transactions on Instrumentation and Measurement</i>, Volume: 62, Issue: 7, pp. 1927-1934, 2013.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>11.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. Sharif <span class=SpellE>Ahmadian</span>, M. <span class=SpellE>Hosseingholi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Discrete Feedback-Based Dynamic Voltage Scaling for Safety Critical Real-Time Systems</span>&quot;, <span class=SpellE><i>Scientia</i></span><i> <span class=SpellE>Iranica</span></i>, <i>Transactions D: Computer Science &amp; Engineering and Electrical Engineering</i>, Volume: 20, Issue: 3, pp. 647-656, 2013.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>12.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, B. Al-<span class=SpellE>Hashimi</span>, and P. <span class=SpellE>Eles</span>, &quot;<span style='color:navy'>Low-Energy Standby-Sparing for Hard Real-Time Systems</span>&quot;, <i>IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems</i>, Volume: 31, Issue: 3, pp. 329-342, 2012.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>13.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>F. <span class=SpellE>Jalali</span>, S. <span class=SpellE>Khodadoustan</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Cooperative Hybrid ARQ in Solar Powered Wireless Sensor Networks</span>&quot;, <i>Microelectronics Reliability</i>, Volume: 52, Issue: 12, pp. 3043-3052, 2012.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>14.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>S. <span class=SpellE>Aminzadeh</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A Comparative Study of System-Level Energy-Management Methods for Fault-Tolerant Hard Real-Time Systems</span>&quot;, <i>IEEE Transactions on Computers</i>, Volume: 60, Issue: 9, pp. 1288-1299, September 2011.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>15.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>S. <span class=SpellE>Khodadoustan</span>, F. <span class=SpellE>Jalali</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Reliability/Energy Trade-off in Bluetooth Error Control Schemes</span>&quot;, <i>Microelectronics Reliability</i>, Volume: 51, Issue: 8, pp. 1398-1412, September-November 2011.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>16.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Khatir</span>, A. <span class=SpellE>Ejlali</span>, and A. <span class=SpellE>Moradi</span>, &quot;<span style='color:navy'>Improving the Energy Efficiency of Reversible Logic Circuits by the Combined Use of Adiabatic Styles</span>&quot;, <em>Integration, The VLSI Journal</em>, <span class=GramE>Volume</span>: 44, Issue: 1, pp. 12-21, January 2011. </p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>17.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, B.M. Al-<span class=SpellE>Hashimi</span>, P. <span class=SpellE>Rosinger</span>, S.G. <span class=SpellE>Miremadi</span>, and L. <span class=SpellE>Benini</span>, &quot;<span class=SpellE><span style='color:navy'>Performability</span></span><span style='color:navy'>/Energy Trade-off in Error-Control Schemes for On-Chip Networks</span>&quot;, <i>IEEE Transactions on Very Large Scale Integration (VLSI) Systems</i>, Volume: 18, Issue: 1, pp. 1-14, January 2010.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>18.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>R.A. <span class=SpellE>Shafik</span>, B.M. Al-<span class=SpellE>Hashimi</span>, S. <span class=SpellE>Kundu</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Soft Error-Aware Voltage Scaling Technique for Power Minimization in Application-Specific Multiprocessor System-on-Chip</span>&quot;, <i>Journal of Low Power Electronics</i>, Volume: 5, Issue: 2, pp. 145-156, August 2009.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>19.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Fazeli</span>, S.G. <span class=SpellE>Miremadi</span>, A. <span class=SpellE>Ejlali</span>, and A. <span class=SpellE>Patooghy</span>, &quot;<span style='color:navy'>Low Energy Single Event Upset / Single Event Transient-Tolerant Latch for Deep <span class=SpellE>SubMicron</span> Technologies</span>&quot;, <em>IET Computers &amp; Digital Techniques</em>, Volume: 3, Issue: 3, pp. 289-303, May 2009.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>20.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>Error Propagation Analysis Using FPGA-based SEU-Fault Injection</span>&quot;, <i>Microelectronics Reliability</i>, Volume: 48, Issue: 2, pp. 319-328, February 2008. </p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>21.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>Emulating Switch-Level Models of CMOS Circuits</span>&quot;, <i>Microelectronic Engineering</i>, Volume: 84, Issue: 2, pp. 204-212, February 2007.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>22.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>G. <span class=SpellE>Asadi</span>, S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>,<span class=GramE>&nbsp; &quot;</span><span style='color:navy'>Fast Co-Verification of HDL Models</span>&quot;, <i>Microelectronic Engineering</i>, Volume: 84, Issue: 2, pp. 218-228, February 2007.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>23.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, B.M. Al-<span class=SpellE>Hashimi</span>, M.T. Schmitz, P. <span class=SpellE>Rosinger</span>, and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>Combined Time and Information Redundancy for SEU-Tolerance in Energy-Efficient Real-Time Systems</span>&quot;, <i>IEEE Transactions on Very Large Scale Integration (VLSI) Systems</i>, Volume: 14, Issue: 4, pp. 323-335, April 2006.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>24.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, and S. G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>FPGA-Based Fault Injection into Switch-Level Models</span>&quot;, <i>Microprocessors and Microsystems</i>, Vol. 28, Issue: 5-6, pp. 317-327, August 2004.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>25.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, and S. G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>FPGA-based Monte Carlo Simulation for Fault Tree Analysis</span>&quot;, <i>Microelectronics Reliability</i>, Vol. 44, Issue: 6, pp. 1017-1028, June 2004.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>26.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>F. R. <span class=SpellE>Poursafaei</span>, S. Safari, M. Ansari, M. <span class=SpellE>Salehi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Offline Replication and Online Energy Management for Hard Real-Time Multicore Systems</span>&quot;, in <em>Proc. </em><i>CSI Symposium on Real-Time and Embedded Systems and Technologies </i>(RTEST 2015), Tehran, Iran, October 2015.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>27.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Taherin</span>, M. <span class=SpellE>Salehi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Stretch: Exploiting Service Level Degradation for Energy Management in Mixed-Criticality Systems</span>&quot;, in <em>Proc. </em><i>CSI Symposium on Real-Time and Embedded Systems and Technologies </i>(RTEST 2015), Tehran, Iran, October 2015.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>28.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Salehi</span>, M. <span class=SpellE>Shafique</span>, F. <span class=SpellE>Kriebel</span>, S. <span class=SpellE>Rehman</span>, M. <span class=SpellE>Khavari</span> <span class=SpellE>Tavana</span>, A. <span class=SpellE>Ejlali</span>, and J. Henkel, &quot;<span class=SpellE><span style='color:navy'>dsReliM</span></span><span style='color:navy'>: Power-Constrained Reliability Management in Dark-Silicon Many-Core Chips under Process Variations</span>&quot;, in <em>Proc.</em> <em>International Conference on Hardware-Software <span class=SpellE>Codesign</span> and System Synthesis</em> (CODES+ISSS 2015), pp. 75-82, Amsterdam, Netherlands, October 2015.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>29.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Salehi</span>, M. <span class=SpellE>Khavari</span> <span class=SpellE>Tavana</span>, S. <span class=SpellE>Rehman</span>, F. <span class=SpellE>Kriebel</span>, M. <span class=SpellE>Shafique</span>, A. <span class=SpellE>Ejlali</span>, and J. Henkel, &quot;<span style='color:navy'>DRVS: Power-Efficient Reliability Management through Dynamic Redundancy and Voltage Scaling under Variations</span>&quot;, <i>in Proc. ACM/IEEE International Symposium on Low Power Electronics and Design</i> (ISLPED 2015), pp. 225-230, Rome, Italy, July 2015.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>30.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Mohammadi</span>, M. <span class=SpellE>Ebrahimi</span>, A. <span class=SpellE>Ejlali</span>, and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>SCFIT: An FPGA-based fault injection technique for SEU fault model</span>&quot;, in <i>Proc</i>. <em>Design, Automation, and Test in Europe </em>(DATE 2012), pp. 586-589, Dresden, Germany, March 2012.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>31.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Khavari</span> <span class=SpellE>Tavana</span>, M. <span class=SpellE>Salehi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Feedback-Based Energy Management in a Standby-Sparing Scheme for Hard Real-Time Systems</span>&quot;, in <i>Proc</i>. <em>IEEE Real-Time Systems Symposium </em>(RTSS 2011), pp. 349-356, Vienna, Austria, December 2011.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>32.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Khatir</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A Body Biasing Method For Charge Recovery Circuits: Improving The Energy Efficiency and DPA-Immunity</span>&quot;, in <i>Proc</i>. <em>IEEE Annual Symposium on VLSI</em> (ISVLSI 2010), pp. 195-200, <span class=SpellE>Kefalonia</span>, Greece, July 2010.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>33.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. Sharif <span class=SpellE>Ahmadian</span>, M. <span class=SpellE>Hosseingholi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A Control-Theoretic Energy Management for Fault-Tolerant Hard Real-Time Systems</span>&quot;, in <i>Proc</i>. <em>IEEE International Conference on Computer Design</em> (ICCD 2010), pp. 173-178, Amsterdam, Netherlands, October 2010.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>34.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Khatir</span>, H. <span class=SpellE>Ghasemzadeh</span> <span class=SpellE>Mohammadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Sub-Threshold Charge Recovery Circuits</span>&quot;,&nbsp;in <i>Proc</i>. <em>IEEE International Conference on Computer Design</em> (ICCD 2010), pp. 138-144, Amsterdam, Netherlands, October 2010.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>35.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>F. <span class=SpellE>Samie</span> <span class=SpellE>Ghahfarokhi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Schedule Swapping: A Technique for Temperature Management of Distributed Embedded Systems</span>&quot;, in <em>Proc. IEEE/IFIP International Conference on Embedded and Ubiquitous Computing</em> (EUC 2010), pp. 1-6, Hong Kong, China, December 2010.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>36.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, B.M. Al-<span class=SpellE>Hashimi</span>, and P. <span class=SpellE>Eles</span>, &quot;<span style='color:navy'>A Standby-Sparing Technique with Low Energy-Overhead for Fault-Tolerant Hard Real-Time <span class=SpellE>Systems<span style='color:black'>&quot;,in</span></span></span> <em>Proc.</em> <em>International Conference on Hardware-Software <span class=SpellE>Codesign</span> and System Synthesis</em> (CODES+ISSS 2009), pp. 193-202, Grenoble, France, October 2009. <strong><span style='color:#3A0080'>[received the Best Paper Award]</span></strong></p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>37.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>H. <span class=SpellE>Ghasemzadeh</span> <span class=SpellE>Mohammadi</span>, S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors</span>&quot;, in <i>Proc. IEEE Pacific Rim International Symposium on Dependable Computing </i>(PRDC 2009), pp. 208-213, Shanghai, China, November 2009.&nbsp;</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>38.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Namazi</span>, S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A High Speed and Low Cost Error Correction Technique for the Carry Select Adder</span>&quot;, in <i>Proc. International Availability, Reliability and Security </i>(ARES 2009), pp. 635-640, Fukuoka, Japan, March 2009.&nbsp;</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>39.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Namazi</span>, Y. <span class=SpellE>Sedaghat</span>, S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A Low-Cost Fault-Tolerant Technique for Carry Look-Ahead Adder</span>&quot;, in <i>Proc. IEEE International On-Line Testing Symposium </i>(IOLTS 2009), pp. 217-222, <span class=SpellE>Sesimbra</span>-Lisbon, Portugal, June 2009.&nbsp;</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>40.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M.H. <span class=SpellE>Razmkhah</span>, S.G. <span class=SpellE>Miremadi</span>, A. <span class=SpellE>Ejlali</span>, and M. <span class=SpellE>Fazeli</span>, &quot;<span style='color:navy'>A Novel SET/SEU Hardened Parallel I/O Port</span>&quot;, in <i>Proc. IEEE Circuits and Systems International Conference on Testing and Diagnosis </i>(ICTD 2009), pp. 1-4, Chengdu, China, May 2009.&nbsp;</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>41.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M.H. <span class=SpellE>Razmkhah</span>, S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A Micro-FT-UART for Safety-Critical <span class=SpellE>SoC</span>-Based Applications</span>&quot;, in <i>Proc. International Availability, Reliability and Security </i>(ARES 2009), pp. 316-321, Fukuoka, Japan, March 2009.&nbsp;</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>42.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Manoochehri</span>, A. <span class=SpellE>Ejlali</span> and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>Joint Write Policy and Fault-Tolerance Mechanism Selection for Caches in DSM Technologies: Energy-Reliability Trade-off</span>&quot;, in <i>Proc. International Symposium on Quality Electronic Design </i>(ISQED 2009), pp. 839-844, San Jose, USA, March 2009.&nbsp;</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>43.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Manoochehri</span>, A. <span class=SpellE>Ejlali</span> and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>Fault Tolerant and Low Energy Write-Back Heterogeneous Set Associative Cache for DSM <span class=SpellE>Technologie</span></span>&quot;, in <i>Proc. International Availability, Reliability and Security </i>(ARES 2009), pp. 448-453, Fukuoka, Japan, March 2009.&nbsp;</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>44.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Jafari-Nodoushan</span>, S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Control-Flow Checking Using Branch Instructions</span>&quot;, in <i>Proc. IEEE/IFIP International Conference on Embedded and Ubiquitous Computing </i>(EUC 2008), pp. 66-72, Shanghai, <span class=SpellE>Chaina</span>, December 2008.&nbsp;</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>45.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>H. <span class=SpellE>Ghasemzadeh</span> <span class=SpellE>Mohammadi</span>, H. <span class=SpellE>Tabkhhi</span>, S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A Cost-Effective Error Detection and Roll-back Recovery Technique for Embedded Microprocessor Control Logic</span>&quot;, in <i>Proc. International Conference on Microelectronics </i>(ICM 2008), pp. 470-473, <span class=SpellE>Sharjah</span>, UAE, December 2008.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>46.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>H. <span class=SpellE>Tabkhhi</span>, S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>An Asymmetric <span class=SpellE>Checkpointing</span> and Rollback Error Recovery Scheme for Embedded Processors</span>&quot;, in <i>Proc. IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems </i>(DFT 2008), pp. 445-453, Boston, USA, October 2008.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>47.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>S.M-H. <span class=SpellE>Shekarian</span>, A. <span class=SpellE>Ejlali</span>, and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>A Low Power Error Detection Technique for Floating-Point Units in Embedded Applications</span>&quot;, in <i>Proc. IEEE/IFIP International Conference on Embedded and Ubiquitous Computing </i>(EUC 2008), pp. 199-205, Shanghai, <span class=SpellE>Chaina</span>, December 2008.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>48.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, B.M. Al-<span class=SpellE>Hashimi</span>, P. <span class=SpellE>Rosinger</span>, and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>Joint Consideration of Fault-Tolerance, Energy-Efficiency and Performance in On-Chip Networks</span>&quot;, in <i>Proc. Design, Automation and Test in Europe Conference and Exhibition</i> (DATE'07), pp. 1647-1652, Nice, France, April 2007.&nbsp;</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>49.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Fazeli</span>, A. <span class=SpellE>Patooghy</span>, S.G. <span class=SpellE>Miremadi</span> and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Feedback Redundancy: A Power Efficient SEU-Tolerant Latch Design for Deep Sub-Micron Technologies</span>&quot;, in <i>Proc. IEEE/IFIP International Conference on Dependable Systems and Networks</i> (DSN 2007), pp. 276-285, Edinburgh, UK, June 2007.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>50.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, and B.M. Al-<span class=SpellE>Hashimi</span>, &quot;<span style='color:navy'>SEU-Hardened Energy Recovery Pipelined Interconnects for On-Chip Networks</span>&quot;, in <i>Proc. IEEE/ACM International Symposium on Networks-on-Chip</i> (NOCS 2008), pp.67-76, Newcastle, UK, 2008.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>51.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>M. <span class=SpellE>Khatir</span>, A. <span class=SpellE>Moradi</span>, A. <span class=SpellE>Ejlali</span>, M. T. <span class=SpellE>Manzuri</span> <span class=SpellE>Shalmani</span>, and M. <span class=SpellE>Salmasizadeh</span>, &quot;<span style='color:navy'>A Secure and Low-Energy Logic Style Using Charge Recovery Approach</span>&quot;, Accepted for publication in <i>Proc. IEEE/ACM International Symposium on Low Power Electronics and Design</i> (ISLPED 2008), Bangalore, India, 2008.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>52.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>Y. <span class=SpellE>Cai</span>, M. Schmitz, A. <span class=SpellE>Ejlali</span>, B.M. Al-<span class=SpellE>Hashimi</span>, and S.M. Reddy, &quot;<span style='color:navy'> Cache Size Selection for Performance, Energy and Reliability of Time-Constrained Systems</span>&quot;, in <i>Proc. Asia and South Pacific Design Automation Conference</i> (ASP-DAC 2006), pp. 923-928, Yokohama, Japan 2006.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>53.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, M. Schmitz, B.M. Al-<span class=SpellE>Hashimi</span>, S.G. <span class=SpellE>Miremadi</span>, and P. <span class=SpellE>Rosinger</span>, &quot;<span style='color:navy'>Energy Efficient SEU-Tolerance in DVS-Enabled Real-Time Systems through Information Redundancy</span>&quot;, in <i>Proc. IEEE/ACM International Symposium on Low Power Electronics and Design</i> (ISLPED 2005), pp.281-286, San Diego, California, USA, 2005.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>54.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>G. <span class=SpellE>Asadi</span>, S.G. <span class=SpellE>Miremadi</span>, H.R. <span class=SpellE>Zarandi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Evaluation of Fault-Tolerant Designs Implemented on SRAM-Based FPGAs</span>&quot;, in <i>Proc. IEEE/IFIP Pacific Rim International Symposium on Dependable Computing</i> (PRDC 2004), pp. 327-332, <span class=SpellE>Papeete</span>, Tahiti, French Polynesia, March 2004.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>55.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>H.R. <span class=SpellE>Zarandi</span>, S.G. <span class=SpellE>Miremadi</span>, S. <span class=SpellE>Hessabi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A Mixed-Mode Simulation-Based Environment to Test and Dependability Assessment of HDL Models</span>&quot;, in <i>Proc. International Conference on Embedded Systems and Applications</i> (ESA 2004), pp. 582-588, USA, June 2004.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>56.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>Switch-Level Emulation</span>&quot;, in <i>Proc. 40th ACM/IEEE Design Automation Conference</i> (DAC-40), pp. 644-649, Anaheim, USA, June 2003.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>57.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, and S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>Time-to-Failure Tree</span>&quot;, in <i>Proc. 49th IEEE Annual Reliability and Maintainability Symposium</i> (RAMS 2003), pp. 148 -152, Florida, USA, January 2003.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>58.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span> and S.G. <span class=SpellE>Miremadi</span>, H. R. <span class=SpellE>Zarandi</span>, G. <span class=SpellE>Asadi</span> and S. B. <span class=SpellE>Sarmadi</span>, &quot;<span style='color:navy'>A Hybrid Fault Injection Approach Based on Simulation and Emulation Co-operation</span>&quot;, in <i>Proc. IEEE/IFIP International Conference on Dependable Systems and Networks</i> (DSN-2003), pp. 479-488, San Francisco, USA, June 2003.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>59.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Switch-Level Fault Emulation</span>&quot;, in <i>Proc. International Conference on Field Programmable Logic and Application</i> <i>(Springer LNCS 2778)</i> (FPL 2003), pp. 849-858, Lisbon, Portugal, 2003.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>60.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>S. <span class=SpellE>Bayat</span> <span class=SpellE>Sarmadi</span>, S.G. <span class=SpellE>Miremadi</span>, G. <span class=SpellE>Asadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Fast Prototyping with Co-operation of Simulation and Emulation</span>&quot;, in <i>Proc. International Conference on Field Programmable Logic and Application (Springer LNCS 2438)</i> (FPL 2002), pp. 15-25, Montpellier (La Grande-<span class=SpellE>Motte</span>), France, 2002.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>61.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>H.R. <span class=SpellE>Zarandi</span>, G. <span class=SpellE>Miremadi</span>, A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Dependability Analysis Using a Fault Injection Tool Based on Synthesizability of HDL Models</span>&quot;, in <i>Proc. IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems</i> (DFT 2003), pp. 485-492, Cambridge, MA, U.S.A, November 2003.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>62.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>H.R. <span class=SpellE>Zarandi</span>, G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Fault Injection into Verilog Models for Dependability Evaluation of Digital Systems</span>&quot;, in <i>Proc. International Symposium on Parallel and Distributed Computing</i> (ISPDC 2003), pp. 281-287, Ljubljana, Slovenia, October 2003.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>63.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>G. <span class=SpellE>Asadi</span>, S.G. <span class=SpellE>Miremadi</span>, S. <span class=SpellE>Bayat</span> <span class=SpellE>Sarmadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Speeding up Design Verification Using Co-operation of Simulation and Emulation</span>&quot;, in <i>Proc. IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics</i>, pp. 283-288, Cluj-Napoca Romania, May 2002.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>64.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>H.R. <span class=SpellE>Zarandi</span>, S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>SILVER: A Simulation-based Fault Injection Tool at Switch Level Using Verilog</span>&quot;, in <i>Proc. Joint 1st Int. Conference on Soft Computing and Intelligent Systems and 3rd Int. Symposium on Advanced Intelligent Systems</i> (SCIS &amp; ISIS 2002), Tsukuba, Japan, October 2002.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>65.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>G. <span class=SpellE>Asadi</span>, S.G. <span class=SpellE>Miremadi</span>, H.R. <span class=SpellE>Zarandi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Fault Injection into SRAM-Based FPGAs for the Analysis of SEU Effects</span>&quot;, in <i>Proc. IEEE International Conference on Field programmable Technology</i> (FPT 2003), pp.428-430, Tokyo, Japan, December 2003.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>66.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>A. <span class=SpellE>Ejlali</span>, B. M. Al-<span class=SpellE>Hashimi</span>, S.G. <span class=SpellE>Miremadi</span>, &quot;<span style='color:navy'>Fast Observation Architecture for FPGA-based SEU Analysis</span>&quot;, in <i>Proc. European Test Symposium</i> (ETS 2005), 2005.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>67.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>S. <span class=SpellE>Timarchi</span>, S.G. <span class=SpellE>Miremadi</span>, and A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>Evaluation of Some Exponential Random Number Generators Implemented by FPGA</span>&quot;, in <i>Proc. International Conference on Parallel and Distributed Computing and Networks</i> (PDCN 2005), pp. 578-583, Innsbruck, Austria, February 2005.</p> <p style='margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo2; tab-stops:list 36.0pt'><![if !supportLists]><span style='mso-fareast-font-family: "Times New Roman"'><span style='mso-list:Ignore'>68.<span style='font:7.0pt "Times New Roman"'>&nbsp; </span></span></span><![endif]><span dir=LTR></span>S. <span class=SpellE>Timarchi</span>, S.G. <span class=SpellE>Miremadi</span>, A. <span class=SpellE>Ejlali</span>, &quot;<span style='color:navy'>A Comparative Evaluation of Some Hardware-Based Pseudo-Random Number Generators</span>&quot;, in <i>Proc. <em>Annual</em></i> <i>International</i> <i>CSI Computer Conference</i> (CSICC 2005), Iran, February 2005. </p> <p>&nbsp;</p> <p><a name=ST></a><b><i><u><span style='font-size:18.0pt;font-family:"Arial","sans-serif"'>Students</span></u></i></b><o:p></o:p></p> <table class=MsoNormalTable border=0 cellpadding=0 width=972 style='width:729.0pt; mso-cellspacing:1.5pt;mso-yfti-tbllook:1184;mso-padding-alt:0cm 5.4pt 0cm 5.4pt'> <tr style='mso-yfti-irow:0;mso-yfti-firstrow:yes'> <td width=19 style='width:14.15pt;padding:.75pt .75pt .75pt .75pt'> <p class=MsoNormal><!--msimagelist--><!--msimagelist--><span style='mso-fareast-font-family:"Times New Roman";mso-no-proof:yes'><img border=0 width=15 height=15 id="_x0000_i1028" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul1.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 3"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td width=947 style='width:710.35pt;padding:.75pt .75pt .75pt .75pt'> <p class=MsoNormal><strong><span style='mso-fareast-font-family:"Times New Roman"'>PhD Graduates:</span></strong><span style='mso-fareast-font-family:"Times New Roman"'> Mohammad <span class=SpellE>Salehi</span> <span class=SpellE>Khanghahbar</span>, <span class=SpellE>Morteza</span> <span class=SpellE>Mohajjel</span><o:p></o:p></span></p> </td> </tr> <tr style='mso-yfti-irow:1'> <td valign=top style='padding:.75pt .75pt .75pt .75pt'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=15 height=15 id="_x0000_i1027" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul1.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 3"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"'><o:p>&nbsp;</o:p></span></p> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"'><o:p>&nbsp;</o:p></span></p> </td> <td style='padding:.75pt .75pt .75pt .75pt'> <p class=MsoNormal><strong><span style='mso-fareast-font-family:"Times New Roman"'>MSc Graduates:</span></strong><span style='mso-fareast-font-family:"Times New Roman"'> <span class=SpellE>Hadi</span> <span class=SpellE>Valikhani</span>, Mohsen Ansari, <span class=SpellE>Sepideh</span> Safari, Amir <span class=SpellE>Taherin</span>, <span class=SpellE>Farimah</span> <span class=SpellE>Ramezan</span> <span class=SpellE>Poursafaei</span>, <span class=SpellE>Fahimeh</span> <span class=SpellE>Bahrami</span>, <span class=SpellE>Narges</span> <span class=SpellE>Vaez</span> , <span class=SpellE>Masoud</span> <span class=SpellE>Karimi</span> <span class=SpellE>Fatemi</span>, Mohammad <span class=SpellE>Kazem</span> <span class=SpellE>Taram</span>, Aida <span class=SpellE>Miralaei</span>, <span class=SpellE>Farzaneh</span> <span class=SpellE>Salehi</span> <span class=SpellE>Minapoor</span>, Saba <span class=SpellE>Ahmadian</span>, Zahra <span class=SpellE>Borhani</span>, Mehdi <span class=SpellE>Kazemi</span>, Mohammad <span class=SpellE>Hossein</span> <span class=SpellE>Fathi</span>, <span class=SpellE>Mojtaba</span> <span class=SpellE>Abbasnia</span> <span class=SpellE>Tehrani</span>, Ahmad <span class=SpellE>Tahmasivand</span>, <span class=SpellE>Nezam</span> <span class=SpellE>Rohbani</span>, <span class=SpellE>Mohammadreza</span> <span class=SpellE>Yousefizadeh</span> <span class=SpellE>Naiini</span>, Amir <span class=SpellE>Kousedghi</span>, Reza Akbar, Abbas <span class=SpellE>Mohammadi</span>, <span class=SpellE>Mostafa</span> <span class=SpellE>Bazzaz</span>, <span class=SpellE>Morteza</span> <span class=SpellE>Mohajjel</span>, <span class=SpellE>Somaie</span> <span class=SpellE>Taheri</span>, <span class=SpellE>Safieh</span> <span class=SpellE>Khodadoustan</span>, <span class=SpellE>Fatemeh</span> <span class=SpellE>Jalali</span>, Ali Sharif <span class=SpellE>Ahmadian</span>, <span class=SpellE>Farzad</span> <span class=SpellE>Samie</span>, <span class=SpellE>Hossein</span> Tajik, Mohammad <span class=SpellE>Salehi</span> <span class=SpellE>Khanghahbar</span>, Mohammad <span class=SpellE>Khavari</span> <span class=SpellE>Tavana</span>, Maryam <span class=SpellE>Bandari</span>, Ali <span class=SpellE>Dastangoo</span>, <span class=SpellE>Soheil</span> <span class=SpellE>Aminzadeh</span>, <span class=SpellE>Elahe</span> <span class=SpellE>Hosseini</span>, <span class=SpellE>Mehrtash</span> <span class=SpellE>Manoochehri</span>, Mohammad <span class=SpellE>Hossein</span> <span class=SpellE>Shekarian</span><o:p></o:p></span></p> </td> </tr> <tr style='mso-yfti-irow:2;height:30.0pt'> <td valign=top style='padding:.75pt .75pt .75pt .75pt;height:30.0pt'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=15 height=15 id="_x0000_i1026" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul1.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 3"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td valign=top style='padding:.75pt .75pt .75pt .75pt;height:30.0pt'> <p class=MsoNormal><strong><span style='mso-fareast-font-family:"Times New Roman"'>Current MSc Students:</span></strong><span style='mso-fareast-font-family:"Times New Roman"'> <span class=SpellE>Mojgan</span> <span class=SpellE>Navardi</span>, Amir <span class=SpellE>Yeganeh</span> <span class=SpellE>Khaaksar</span>, <span class=SpellE>Mostafa</span> <span class=SpellE>Mirzaei</span> <span class=SpellE>Aminloo</span>, <span class=SpellE>Mojtaba</span> <span class=SpellE>Nejadpour</span> <span class=SpellE>Esmaeili</span>, Mohsen <span class=SpellE>Shekarisaz</span>, <span class=SpellE>Pooya</span> <span class=SpellE>Toutounchian</span>, Ali <span class=SpellE>Hosseinghorban</span>, <span class=SpellE>Alireza</span> <span class=SpellE>Lotfi</span>, <span class=SpellE>Saman</span> <span class=SpellE>Mahmoudi</span> <o:p></o:p></span></p> </td> </tr> <tr style='mso-yfti-irow:3;mso-yfti-lastrow:yes;height:31.5pt'> <td valign=top style='padding:.75pt .75pt .75pt .75pt;height:31.5pt'> <p class=MsoNormal><span style='mso-fareast-font-family:"Times New Roman"; mso-no-proof:yes'><img border=0 width=15 height=15 id="_x0000_i1025" src="Alireza%20Ejlali's%20Home%20Page_files/acnvbul1.gif" alt="Description: Description: Description: Description: Description: Description: Description: Description: Description: 3"></span><span style='mso-fareast-font-family:"Times New Roman"'><o:p></o:p></span></p> </td> <td valign=top style='padding:.75pt .75pt .75pt .75pt;height:31.5pt'> <p class=MsoNormal><strong><span style='mso-fareast-font-family:"Times New Roman"'>Current PhD Students:</span></strong><span style='mso-fareast-font-family:"Times New Roman"'> <span class=SpellE>Mostafa</span> <span class=SpellE>Bazzaz</span>, Mohammad <span class=SpellE>Taghi</span> <span class=SpellE>Teimoori</span>, <span class=SpellE>Mostafa</span> <span class=SpellE>Jafari-Nodoushan</span>, Reza <span class=SpellE>Narimani</span>, <span class=SpellE>Behnaz</span> <span class=SpellE>Ranjbar</span>, Mohsen Ansari, <span class=SpellE>Bardia</span> <span class=SpellE>Safaei</span><o:p></o:p></span></p> </td> </tr> </table> <p><a name=CT></a><b><i><u><span style='font-size:18.0pt;font-family:"Arial","sans-serif"'>Courses Taught</span></u></i></b></p> <p>Low Power Design, Grad. </p> <p><span class=GramE>Embedded System Design, Grad.</span></p> <p>Digital System Design (CAD, FPGA, Verilog), Undergrad.</p> <p>Computer Architecture, Undergrad.</p> <p><span class=GramE>Digital Design (Logic Design), Undergrad.</span></p> <p>Advanced Digital Design (Advanced Logic Design), Undergrad.</p> <p><span class=GramE>Computer Architecture LAB., Undergrad.</span></p> <p><span class=GramE>Electronics LAB., Undergrad.</span></p> <p><a href="http://ce.sharif.edu/%7Eejlali">Link to Course Page</a></p> <p>&nbsp;</p> <p><b><i><u><span style='font-size:18.0pt;font-family:"Arial","sans-serif"'>Editorial Board</span></u></i></b></p> <p>Journal of Circuits, Systems and Computers (World Scientific)</p> <p><span class=SpellE>Scientia</span> <span class=SpellE>Iranica</span>, Transactions on Computer Science &amp; Engineering and Electrical Engineering (Sharif University of Technology) </p> <p><o:p>&nbsp;</o:p></p> <p>Last Update:&nbsp; 25 August 2017</p> <p align=center style='text-align:center'>&nbsp;</p> </div> </body> </html>