ASIC/FPGA Chip Design

Lecture 8 (pdf)

Project (pdf) (codes)

Due Date: 87/10/16

Course information

Additional documents

Course information	ASIC/FPGA Chip Design Instructor: Dr. Bijan Alizadeh FALL 2008
Content	COURSE OBJECTIVES ASIC Chip Design Methodology FPGA Chip Design Methodology CAD algorithms How to use CAD tools to design and verify a digital chip design TEXT BOOK 1) "Verilog HDL Synthesis A Practical Primer". 2) "Computer Systems Design and Architecture", 2nd Edition, Prentice Hall, 2004. 3) "Digital Design, Preview Edition", John Wiley & Sons, 2006. 4) "Application-Specific Integrated Circuits", Addison Wesley Professional, 1997. 5) "Verilog HDL Synthesis A Practical Primer", Star Galaxy Publishing, 1998. 7) "Field-Programmable Devices Technology, Application, Tools", Stan Baker Associates, 1996. 8) "An Introduction to VLSI Physical Design", McGraw-Hill Series in Computer Science, 1996. 9) "Synthesis and Optimization of Digital Circuits", McGraw-Hill, 1994. 10) http://www.altera(xilinx, actel or atmel).com COURSE OUTLINES 1. Digital Design Methodologies 2. Introduction to HDL (PDF) 2.1 Verilog 3. Programmable Logic Devices (PDF) 3.1 SPLD 3.2 CPLD 3.3 FPGA 4. Hardware Synthesis using Verilog 5. Synthesis Algorithms 5.1 High level Synthesis (pdf) 5.2 Logic Synthesis (pdf1) (pdf2) 6. Post-synthesis Verification 7. Physical Design Algorithms 7.1 Partitioning 7.2 Floorplanning 7.3 Placement 7.4 Routing 8. Post-layout Verification 9. Advanced Topics
Grading	Participation and quizzes 5% Computer Assignments 15% Presentation 25% Project 25% Final Exam 30%
Additional Documents
Assignments	HOMEWORKS 1- HW1 (PDF) 2- HW2 (PDF, SIS_Paper)
Useful links